Memory Buffer

The Memory Buffer is the central switching register. The word coming

from or going to memory is retained in this register. In arithmetic

operations it holds the addend, subtrahend, multiplicand, or divisor.

The left 6 bits of this register communicate with the Instruction

Register. The address portion of the Memory Buffer Register communicates

with the Index Adder, the Memory Address Register, and the Program

Counter. In certain instructions, the address portion of the control

word does not refer to memory but specifies variations of an

instruction, thus, the address portion of the Memory Buffer is connected

to the Control Element.

Preliminary Specifications: Programmed Data Processor Model Three (PDP-3) October, 1960 · 第 13 / 71 题