INSTRUCTION FORMAT

The instructions for PDP-3 may be divided into three classes:

1. Indexable memory instructions

2. Non-indexable memory instructions

3. Non-memory instructions.

The layout of the instruction word is shown in Fig. 2.

The octal digits 0 and 1 define the instruction code, thus, there are 64

possible instruction codes, not all of which are used. The first bit of

octal digit 2 is the indirect address bit. If this bit is a ONE,

indirect addressing occurs.

The index address, X, is in octal digits 3, 4, and 5. These digits

address an index register for memory-type instructions. If these digits

are all ZERO, indexing will not take place. In main memory, 511 of the

registers can be used as automatic index registers.

The instruction base address, Y, is in octal digits 7 through 11. These

digits are sufficient to address 32,768 words of memory. Octal digit 6

is reserved for further memory expansion. Space is available in the

equipment frame for this expansion, should it prove desirable.

In those instructions which do not refer to memory, the memory address

digits, Y, and in some cases the index address digits also, are used to

specify the variations in any group of instructions. An example of this

is in the shift and rotate instructions in which the memory address

digits determine the number of shifts.

Preliminary Specifications: Programmed Data Processor Model Three (PDP-3) October, 1960 · 第 32 / 71 题