The PDP-3 circuitry is the static type using saturating transistor
flip-flops and, for the most part, transistor switch elements. The
primary active elements are Micro-Alloy and Micro-Alloy-Diffused
transistors. The flip-flops have built-in delay so that a logic net may
be sampled and changed simultaneously.
Machine timing is performed by a delay line chain. Auxiliary delay line
chains time the step counter instructions (multiply, divide, etc.). The
machine is thus internally synchronous with step counter instructions
being asynchronous. The machine is asynchronous for in-out operations,
that is, the completion of an in-out operation initiates the following
instruction.